RADIOING.com - eEngineer
HyperLynx Applications
1.0 Introduction
HyperSuite EXT software is primarily for the analysis of
electronic Printed Circuit Board (PCB) design as an aid in minimizing potential
PCB design problems that can contribute to electromagnetic emissions. Use of the software analysis services
throughout the PCB design cycle can help eliminate any circuit design revisions
needed to address signal integrity, crosstalk, and emission problems. The optimization of PCB performance provides
an effective means of preparing equipment for meeting applicable EMC test
requirements. Proper planning for use
of the software can result in lower overall development costs for most
electronic equipment. HyperSuite EXT is
a high-speed PCB design suite that includes signal-integrity, crosstalk, and
EMC analysis tools. It provides for the
analysis of high-speed designs early in the design cycle and prior to layout
(LineSim); after placement but prior to routing, or after placement and routing
of a few critical nets (BoardSim); and after complete PCB layout
(BoardSim). Single boards and
multi-board systems may be analyzed using LineSim or BoardSim. LineSim is also useful for generating the
constraints needed for high speed PCB routing.
Interactive simulations may be run for a quick analysis of any critical
nets or the batch mode may be used for simulation of a large number of nets
simultaneously.
2.0 Procedures
Application of
the software design and analysis tools becomes more beneficial if the PCB
design process is properly planned and tailored for their use. Plans should be made to make efficient use
of the software applications throughout the PCB design process. The following is a description of the
HyperLynx software suite analysis capabilities and the recommended sequence of
application.
2.1 Pre-Layout
Fast Analysis
A fast analysis
should be used at the schematic level to identify and determine suitable
“what-if” design alternatives. Layout
files are not needed for this application. LineSim is an excellent tool for solving
signal integrity and EMC problems early in the design cycle, prior to investing
time in the PCB layout. Critical nets
and signals with fast switching characteristics should be identified as high
priority candidates for the pre-layout analysis. These are usually associated with clock signals and the devices
having rapid transition times. Any
applicable constraints should be determined for the critical nets and
signals. Constraints may be used during
the analysis for increased accuracy and as an aid when the critical nets are
routed. Exact device models are not
needed early in the design process since this type of information may not be
available. Models may be determined and
added as the design materializes.
2.2
Post-Layout Detailed Analysis
A detailed
post-layout analysis should be done using the layout tool files saved in the
“hyp” extension. There are some
problems that can only be determined after PCB layout. For example, a properly designed net can be
affected by the board’s overall layout characteristics and geometry. If a trace length is not constrained
properly during routing, or if a net overly extends itself between board
layers, there can be some unanticipated problems. BoardSim is usually used after layout and routing since the
analysis is based on actual details of a board's routing. However, it can also analyze a board as soon
as it is placed, prior to routing, by using Manhattan Routing that BoardSim
creates; or when the board is placed and only partially routed.
2.2.1 Input
Files
The initial step
in running BoardSim is to translate the PCB layout into BoardSim's file format
(".HYP"). OrCAD is
a good layout software tool for this purpose. However, board layout files are acceptable
from several different layout tools and boards from different layout programs
may be mixed. Some PCB layout tools contain a BoardSim
translator that is available as a menu item.
Other tools may require an external translator that is supplied with
BoardSim. BoardSim supports the
following PCB layout tools: OrCAD Layout, Protel Advanced PCB, Accel EDA /
P-CAD, Cadence Allegro, Innoveda PowerPCB (formerly PADS), Mentor BoardStation
and Veribest, Zuken-Redac Visula / Cadstar, Zuken CR-3000 / 5000.
BoardSim's
MultiBoard option provides the capability to load multiple boards
simultaneously, interconnect them, and simulate the PCB’s as a system. The files for each board may be in .HYP file
format, or in a type of I/O Buffer Information Specification (IBIS) board model
called Electrical Board Description (.EBD).
The EBD format allows for modeling of random interconnects, and it can
be used to represent PCBs, complex IC packages, and custom modules. If the equipment to be analyzed consists of
locally designed PCBs, it is recommended that all of the boards be made
avaliable as .HYP files. Third party
boards such as memory modules may be provided in EBD format. The primary difference between the .HYP file
and an EBD model is that the .HYP file contains physical details about trace
routing, stackup, etc. EBD models are
completely electrical with the interconnects represented as transmission lines
and pre-calculated inductance, capacitance, impedance and delays. An .HYP file can be viewed since it is based
on a physical routing; however, an EBD file has no physical information to
display. Either file type may be used
to include the effects of plug-in modules and boards for a multi-board
simulation.
2.2.2 Models
Detailed device
models may be created during the design analysis process. The I/O Buffer Information Specification
(IBIS) standard is used by most IC manufacturers to provide models for their
devices. IBIS models are widely
available and can usually be downloaded from vendor web sites. HyperLynx supplies more than 6,900 IC models
with BoardSim and LineSim. HyperLynx
provides a special spreadsheet and component database for searching and sorting
models based on manufacturer, part name, creation date, function, etc. Models may also be created for specialty or
custom IC’s that are not included in vendor or HyperLynx libraries.
Utilities are
available to create the IBIS models from SPICE net lists. SPICE is useful for designing mixed-signal
systems since HyperLynx does not have analog models. In some cases, a vendor may supply SPICE models because the IBIS
models are not yet available. SPICE
Writer is available as an option in LineSim and in BoardSim to automatically
generate a SPICE netlist output file containing a complete description of a
schematic (LineSim) or selected net (BoardSim) using SPICE transmission line
elements. This output file also
contains the passive components for the selected net as well as comment lines
listing the drivers and receivers for which the user can provide SPICE models.
A detailed
analysis may be performed on the critical nets and signals once the models that
contain all of the required information are established. If the analysis indicates any potential
emission problems, corrective action should be taken to modify the layout. After the placement of all critical devices
has been determined, the routing patterns for critical signals can be
specified. Trace routing constraints may
be captured as a topology rule for reducing emission levels.
The radiation produced
by a net's component packages can be as significant as that generated by the
net's trace segments. BoardSim has the
capability to analyze a device package's footprint to determine the package
style (DIP, SOIC, etc.) and automatically generate a radiation model for the
package.
3.0
Documentation
When all of the
design constraints have been achieved and a detailed analysis of the critical
nets does not indicate any potential problems, the design may proceed to the
fabrication phase. The report and
documentation capability of HyperSuite consists of schematic printing
(LineSim), for documentation of interconnect circuits; board and net statistic
summaries; and an archiving feature that can combine all of the design files
(.HYP, IC models, session edits, etc.) into a single directory or zip file.
4.0
Recommendations
Any proposed PCB
design changes should be carefully considered for possible impacts to other
design objectives, such as overall circuit functionality, size requirements,
manufacturing constraints, and thermal effects. Design changes made to reduce electromagnetic emissions may
impact other circuit requirements. Some
design alternatives may result in a higher level of PCB design complexity in
order to optimize EMC performance. This
may increase the cost of the circuitry and system of boards. A typical case is a design that requires an
increase in the number of board layers to reduce electromagnetic emissions to
acceptable levels, thus increasing board manufacturing costs. Some situations may require a more detailed
analysis which takes into account the enclosure shielding, board image planes
and EMI filters in order to compromise on such design changes.