Desirable EMI/EMC Software Suite Characteristics - eEngineer

EMI/EMC Analysis Software Characteristics

1. Simulation of electromagnetic emissions and susceptibility for electrical and electronic equipment including the internal circuits, printed circuit boards, and the interconnecting cables/connectors, with considerations for the proposed operating environment.


2. An interactive user interface for pre-route analysis of signal integrity/EMI allowing for early investigation of board structures, stack-ups, materials, technologies, and design rules.


3. Analysis of complex PCB’s with IC packages and any number of vias and signal traces, including multiple, arbitrarily shaped power and ground planes.


4. Analysis of signal integrity effects including resonant frequencies of power and ground structures with associated decoupling capacitors, crosstalk, power/ground bounce, propagation delays, signal ringing, signal reflections, overshoot, undershoot, simultaneous switching noise, impedance discontinuities due to changes in signal layers or split supply planes, and noise coupling between signal lines and supply planes. 


5. Time domain effects such as propagation delay, rise and fall times, reflections and ringing.


6. Frequency domain phenomena such as resonant modes and S-parameters


7. Emission reduction analysis at the box and interconnecting levels such as for shielded coax, connectors and enclosures; aperture radiation from equipment boxes and cabinets; high-frequency effects in cable/connectors such as poor grounding or improper connection; and package effects such as resonance, poor grounding, and radiated emissions.


8. 2-D analysis models for structures with uniform cross-sections such as PCB stack-ups. 3-D analysis models for non-uniform, non-planar structures such as connectors, vias, ground planes, and power distribution grids. 


9. Determination of any frequency dependent parasitics for the resistance, inductance, capacitance, and dielectric conductance associated with each PCB trace and via.  Provide 3D parasitic extraction where 3D structures are found such as traces, vias and arbitrarily shaped pads. This should include the parasitic modeling and mutual couplings of all power/ground planes, partial ground planes, split ground planes, arbitrarily shaped ground planes, meshed ground planes, and power/ground trace structures. 


10. Capability of accepting customer inputs for the applicable test specifications.


11. Applicable to RF, digital, analog and mixed circuit designs.


12. Simultaneously simulate radiated and conducted emissions.


13. Generate graphical field plots and text reports.


14. PCB layout analysis for identification of nets with crosstalk, ringing, time delays, overshoot, undershoot, settling time and noise margin violations. 


15. User configurable reports of signal integrity parameters to enable the designer to quickly and easily find and correct problems with a minimum of design iterations. 


16. Electromagnetic emissions simulation immediately above or below a PCB allowing for the identification of problem nets. This simulation should be done during routing or at the post-layout stage. Simulate both individual or multiple nets to enable first-pass EMC verification by locating highly radiating traces and finding radiated field “hot spots. Predict emissions from a board; address the emissions from pins and vias as well as from traces. Even if a board is encapsulated with copper planes as striplines, emissions still occur from component pins and vias protruding above the ground planes.  To analyze on the basis of signal integrity (i.e. pulse shape) and crosstalk, it is necessary to perform a field analysis associated with the cross-sections of all multi-conductor transmission line systems in order to obtain the parasitics.


17. Field solver utilization such as the boundary element method (BEM) field solver to produce equivalent circuit models of general microstrip and stripline transmission line structures. This provides outputs matrices of derived parasitics (e.g. inductance, capacitance and resistance matrices), and voltage/current mode shapes and velocities, impedances and a variety of transmission line models that are readable by other suite elements or programs such as SPICE products for the purpose of pre-layout simulation and rules generation.


18. A Ground Plane Modeler capable of simulating two-sided boards and multi-layer boards with partial power and ground planes.  It should be capable of automatically incorporating equivalent circuits for no ground and imperfect ground designs into PCB transmission line networks without the intervention of the user.  Solid ground planes offer the highest level of shielding against crosstalk and emissions. However, for compactness and manufacturing economy, no ground and partial ground planes are often employed. Slots and copper areas are common, especially in double sided boards. If there are copper areas and power nets, these should be analyzed to find where the copper areas are coupled to the tracks.


19. A Database Manager to allow for rapid display, addition and deletion of models in the component, translation and subcircuit databases.  This would provide for tracing map user part codes to existing components, attaching subcircuits to pins and using IBIS selected behavioral or SPICE models.


20. A suite modeling method that can show results relative to changes.  It should allow for the evaluation of the effects upon radiated fields due to changes in single nets, groups of nets, entire printed circuit boards, and complete systems combining boards, cabling and enclosures. 


21. Displays should include the vertical, horizontal and radial electric and magnetic fields, either together or separately. Displays should include maximum field vs. frequency, as well as the fields at the observation points in a three dimensional graph resembling the measurement positions used in a testing facility. The direct field contributions from the individual nets should be displayed as well as the coupled field contributions from the induced currents on the enclosure, cabling, ground planes and substrates. It should be capable of displaying the current spectrum of each net on a board, as well as the current waveforms of each component pin.


22. The user interface should follow the functionality of a shielded testing facility or open area test site. Users should be able to select and change the test requirements and test setup. The software should provide internationally recognized test standards such as FCC Part 15 and EIC CISPR and allow specific test standards to be defined by the user.


23. IBIS compliant behavioral modeling tool utilization to provide behavioral component models for use in simulations, e.g. V-I curve-based signal integrity simulation models for use in the emissions, signal integrity and crosstalk analysis.  This allows behavioral models to be developed conveniently from IC manufacturer data sheet information, or SPICE simulations of more complex models. It should also be capable of accepting experimental data. The models created are then placed within components that are easily managed under the software’s database manager.  The software should automatically read in IBIS model files, create SPICE driver and receiver models for the components (where applicable), and attach the driver and receiver models to the appropriate pins on the specified part.


Note:  I/O Buffer Information Specification (IBIS), ANSI/EIA-656-1995 (IBIS) is an international standard for the electrical specification of chip drivers and receivers. It provides a standard file format for recording parameters like driver output impedance, input loading, and rise/fall times for utilization by most any software application such as IBIS simulation models. IBIS provides the V-I curves for a driver’s HI and LO states, and its transition rate characteristics. The use of V-I curves allows IBIS models for non-linear effects like emitter-follower outputs, diodes, and TTL totem-pole drivers.  IBIS is also effective in producing accurate simulations of high-speed ringing and crosstalk and worst-case rise time conditions.

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